OR Fig. 7.2 shows the symbol for a logic gate and its truth table. [Figure 7.2]

1. (a)State the name of the logic gate shown in Fig. 7.2.[1]
2. (b)(i)Fig. 7.3 shows two of these logic gates connected to make a bistable circuit. [Figure 7.3] Terminals P and Q each have the logic level 0. Terminal X has the logic level 1. Explain why terminal Y has the logic level 0.[1]
3. (b)(ii)Terminal P is briefly connected to a supply of logic level 1. State the effect of this on the logic level of terminal X and the logic level of terminal Y.[1]
4. (b)(iii)Terminal P returns to logic level 0 again. State the effect of this return to value 0 on the logic level of terminal X and on the logic level of terminal Y.[1]
5. (b)(iv)State how this circuit exhibits the property of memory.[1]

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