Reduced Instruction Set Computers (RISC) and Complex Instruction Set Computers (CISC) are two types of processor.

Mark scheme

Marking points from the official mark scheme (May/June 2022). The mark or mark type is shown in brackets.

1. [4] 4(a) RISC max 2 any two from: • Uses simple instructions • Uses fixed length instructions • Instructions only require one clock cycle • Uses many registers • Makes use of pipelining Hardwired CU CISC max 2 any two from: • Uses many instruction formats • Uses variable length instructions • Makes use of different addressing modes • Uses few registers • Has a large instruction set • Requires complex circuits • Frequently uses cache • Instructions (converted to sub-instructions that) may require many clock cycles • Programmable CU
2. [2] 4(b) One mark for each difference max 2 from: • RISC has fewer instructions // CISC has more instructions • RISC has many registers // CISC has few registers • RISC's instructions are simpler // CISC's instructions are more complex • RISC has a few instruction formats / CISC has many instruction formats • RISC usually uses single-cycle instructions// CISC uses multi-cycle instructions • RISC uses fixed-length instructions // CISC uses variable-length instructions • RISC has better pipelineability // CISC has poorer pipelineability • RISC requires less complex circuits// CISC requires more complex circuits • RISC has fewer addressing modes // CISC has more addressing modes • RISC makes more use of RAM// CISC makes more use of cache/less use of RAM • RISC has a hard-wired control unit // CISC has a programmable control unit • RISC only uses load and store instructions to address memory // CISC has many types of instructions to address memory