Consider the logic expression: X = (J XOR NOT K) NAND NOT L
- (a)Draw a logic circuit for the logic expression. Each logic gate must have a maximum of two inputs. Do not simplify the logic expression. J K L X[4]
- (b)Complete the truth table for the given logic expression. J K L Working space X 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1[4]
This question uses a diagram from the original paper, which isn't shown here. Open the full paper from the past papers archive to see it.
Mark scheme
Marking points from the official mark scheme (Oct/Nov 2025). The mark or mark type is shown in brackets.
- [1] One mark for each correct gate, with the correct input(s) as shown.
- [4] (Image of logic circuit diagram showing: NOT K connected to XOR with J. NOT L connected to NAND with XOR output. Final output X.)
- J K L X 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 0 1 1 1 1
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