O-LevelComputer ScienceHardware2210/13 · Oct/Nov 2024 · Q36 Marks
An instruction is fetched from random access memory (RAM) into the memory data register (MDR) to be decoded.
- (a)Identify two other registers that are used in the fetch stage of the cycle. 1 2[2]
- (b)Complete and annotate the diagram to show how the data is decoded once it has been fetched into the MDR. MDR[4]
This question uses a diagram from the original paper, which isn't shown here. Open the full paper from the past papers archive to see it.
Mark scheme
Marking points from the official mark scheme (Oct/Nov 2024). The mark or mark type is shown in brackets.
- [2] Program counter // PC; Memory address register // MAR; Current instruction register // CIR
- [4] One mark for each correct part of the diagram. The diagram shows: Data/Instruction sent from the MDR to the CIR/CU; using the data bus; the CIR that is built into the CU; Data/instruction separated into operand and op code; Control unit/CU decodes instruction; using an instruction set.
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