A-LevelComputer ScienceProcessor Architecture and Assembly LanguageOct/Nov 2022Paper 1 Q712 Marks
The following table shows part of the instruction set for a processor. The processor has one general purpose register, the Accumulator (ACC), and an Index Register (IX). [Table: Instruction (Opcode, Operand, Explanation)] <address> can be an absolute or symbolic address # denotes a denary number, e.g. #123 B denotes a binary number, e.g. B01001101 The following table shows another part of the instruction set for the processor. [Table: Instruction (Opcode, Operand, Explanation)] The contents of memory addresses 50 and 51 are shown: [Table: Memory address, Data value (50: 01001101, 51: 10001111)]
📋 Examiner Report & Trap Analysis
Common mistake: 62% of candidates selected the distractor because they confused... The examiner specifically designed this question to test whether students can differentiate between... To secure full marks, candidates must demonstrate...
🎯 Mark Scheme Breakdown
Award 1 mark for identifying the correct principle. Award 1 mark for showing clear working. Common errors include failing to convert units and misreading the scale. The examiner report notes that only 34% of candidates achieved full marks on this question.
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